1. Field of the Invention
The present invention relates to an interface circuit and a semiconductor integrated circuit that are used for performing signal transmission with a transmission line, as well as a method for adjusting termination resistance. The present invention can be used as a high speed interface circuit such as a USB driver.
2. Description of the Prior Art
Conventionally, interface circuits are disposed at every place in an internal circuit and an external circuit of a computer. For example, DDR2 (Double Data Rate 2) standard is adopted as an interface circuit for high speed data transmission in an SDRAM that is used as a main memory of a computer. In addition, USB (Universal Serial Bus) standard is used commonly as an interface circuit between a computer and a peripheral device.
In such an interface circuit, it is necessary to match its output impedance with characteristic impedance of a transmission line such as a reception circuit or a cable so as to perform correct transmission by preventing reflections and losses of an output signal. In addition, it is necessary to adjust rise time and fall time (slew rate) of a waveform of the output signal to fall within an appropriate range. If it is too short, it may cause noises. If it is too long, the waveform may be deteriorated.
In order to deal with this problem conventionally, a function for adjusting and controlling termination resistance in the interface circuit is provided inside a memory LSI (Large Scale Integrated circuit) that is a semiconductor integrated circuit. For example, an ODT (On Die Termination) circuit that is provided to a DDR2 standard memory can adjust its termination resistance to a value of 75 ohms or 150 ohms. In other words, the ODT circuit has many transistor pairs of p-type and n-type that are connected in parallel so as to form a terminating resistor. The number of transistors that are connected in parallel actually is adjusted by a control signal supplied to their gates, so that a resistance value of the transistors is controlled to be equal to a resistance value of an external reference resistor (see U.S. Pat. No. 7,193,431).
In addition, in order to maintain the impedance and the slew rate at constant values even if a manufacturing process or an operational environment changes, a method is proposed in which output impedance of a plurality of output MOSFET's connected in parallel is adjusted by a first controlling portion that selects the number of output MOSFET's to be turned on, while a slew rate is adjusted by a second controlling portion that adjusts a drive signal of the output MOSFET to be turned on (see Japanese unexamined patent publication No. 2004-327602).
However, the interface circuit or the driver circuit described above is usually disposed inside the LSI, so values of on-resistance of on-chip resistors or transistors vary substantially in accordance with process conditions in the manufacturing steps of the LSI or its operating temperature. Therefore, the structure described in U.S. Pat. No. 7,193,431 includes an additional reference resistor provided to the outside of the LSI, which causes a problem that the number of components as well as an area for mounting components are increased due to the external reference resistor.
In addition, the circuit described in Japanese unexamined patent publication No. 2004-327602 uses an impedance adjustment code and a slew rate adjustment code for performing adjustment of the output impedance or the slew rate, but it only discloses that an external resistor should be used as a method for generating the codes.
In this way, although it is proposed that adjustment of the terminating resistor and adjustment of the slew rate should be performed in the interface circuit conventionally, the adjustment needs an external reference resistor and cannot be performed as an internal function of the LSI.
Thus, there are remaining problems in the conventional interface circuit, which are increases of the number of components and the area for mounting components, deterioration of waveform due to increase of reactance when an external resistor is used, and others.